長めの読みもの
この文書はまだ翻訳されていません。本文は英語のまま表示されています。
Each of the chip’s tools carries an instrument and the prose that explains it. The prose also stands on its own, set as an article and justified like a page of a book. This is the list of them, longest first.
17 articles, 17,081 words, counted from the prose each one renders
Tracer
Tracer: the whole circuit, one half-cycle at a time
Every node and every edge of the MOS 6502 on one screen, at their positions on the die, lit by the transistor-level simulation and re-marked at each half-cycle with everything that moved, beside the program that is running.
The talk
Where the die data came from
The 6502 was decapped in acid, photographed through a microscope and redrawn polygon by polygon. That trace is what this site simulates. The talk that described the process, with its claims re-checked against the silicon.
Chip map
The chip as one schematic
The whole MOS 6502 as a block-level schematic: every derived container a box, the wiring between them bundled, laid out by pin distance and die order, lit by the running chip.
The designer
What the designer remembers
Bill Mensch co-designed the 6502 and described what went into it forty years later. His account of the on-chip clock generator, the decimal correction and the unused opcodes, with each claim re-asked of the silicon.
Primer
Primer: how the 6502 actually works
What the MOS 6502's pins are, what the clock does, what an opcode does and does not do, and where the usual mental model of a processor stops being true.
Exploded
Exploded: the 6502, taken apart
The MOS 6502's own polygons, pulled apart along two axes: the three physical layers of the die, and the functional blocks derived from its wiring.
Schematic
Schematic: the 6502 as a circuit
Every static gate on the MOS 6502, recognised from the switch network rather than drawn: pick a signal and see the circuit that makes it.
Halfshot
Halfshot: a program, one frame per half-cycle
The chosen program running on the transistor-level MOS 6502, photographed at every clock edge: the registers, buses and pins on a fixed plate, and what switched between one half-cycle and the next drawn beside it. Step through the frames or download the whole recording.
The published figure
The published block diagram
Every 6502 datasheet opens with the same block diagram. Here it is as a dataset, drawn from that dataset, with every block it names resolved against the actual signals on the die.
Timing
Timing: the 6502 counts nothing
Every 6502 instruction's length, measured from sync to sync with no instruction table involved. The chip has no cycle counter; the counts are emergent.
Decode
Decode: the 6502's PLA, measured
All 122 product terms of the MOS 6502's decode PLA, located in the netlist and measured by running the chip against every one of the 256 opcodes.
The pinout
The forty pins
The MOS 6502 package, pin by pin, with each signal resolved against the die: which functional block it belongs to, how far it reaches, and whether it is an input or an output measured from the switch network rather than copied off an arrow.
The graph
The chip as a graph
Every node of the MOS 6502 drawn at its own centroid on the die, with every connection the netlist has. No layout algorithm: the positions are the ones the people who drew the chip chose.
Trace
Trace: one instruction, half-cycle by half-cycle
Pick any opcode and follow it through the MOS 6502 one half-cycle at a time: the registers as they mutate, every node that changed level, and the wires that are shorted together while it happens.
Blueprint
Blueprint: the 6502 datapath, derived
An idealised block diagram of the MOS 6502 datapath, derived from switch topology rather than drawn by hand, and driven live by the transistor-level simulation.
Programs
Programs: assembled, explained, and run on the silicon
The programs this site runs, as source rather than hex: assembled in the page, annotated line by line, and executed on a transistor-level simulation of the MOS 6502.
Blocks
Functional blocks of the MOS 6502
One functional block of the MOS 6502 at a time: what crosses its boundary, the circuit inside it, and what it does when the chip runs. Derived from the switch network, not drawn.